Specifications
General Exception Funnel............................................................................................................8-26
Hardware Interrupt Funnel..........................................................................................................8-26
Software Exception Funnel...........................................................................................................8-28
Invalid Instructions....................................................................................................................... 8-32
The Nios II Instruction-Related Exception Handler............................................................................ 8-32
Writing an Instruction-Related Exception Handler.................................................................8-32
Registering an Instruction-Related Exception Handler........................................................... 8-34
Removing an Instruction-Related Exception Handler.............................................................8-35
Document Revision History for Exception Handling.......................................................................... 8-35
Cache and Tightly-Coupled Memory..................................................................9-1
Nios II Cache Implementation...................................................................................................................9-1
Defining Cache Properties..............................................................................................................9-2
HAL API Functions for Managing Cache................................................................................................9-2
Initializing the Nios II Cache after Reset..................................................................................................9-2
Assembly Code to Initialize the Instruction Cache.....................................................................9-3
Assembly Code to Initialize the Data Cache................................................................................9-3
For HAL Users..................................................................................................................................9-3
Nios II Device Driver Cache Considerations...........................................................................................9-3
For HAL Users..................................................................................................................................9-4
Cache Considerations for Writing Program Loaders.............................................................................9-4
For Users of the HAL...................................................................................................................... 9-5
Managing Cache in Multi-Master and Multi-Processor Systems.........................................................9-5
Bit-31 Cache Bypass.........................................................................................................................9-5
For HAL Users..................................................................................................................................9-6
Nios II Tightly-Coupled Memory..............................................................................................................9-6
Document Revision History for Cache and Tightly-Coupled Memory...............................................9-6
MicroC/OS-II Real-Time Operating System....................................................10-1
Overview of the MicroC/OS-II RTOS.................................................................................................... 10-1
Further Information......................................................................................................................10-1
Licensing......................................................................................................................................... 10-2
Other RTOS Providers..............................................................................................................................10-2
The Nios II Implementation of MicroC/OS-II......................................................................................10-2
MicroC/OS-II Architecture..........................................................................................................10-2
MicroC/OS-II Thread-Aware Debugging..................................................................................10-3
MicroC/OS-II Device Drivers......................................................................................................10-3
Thread-Safe HAL Drivers.............................................................................................................10-4
The newlib ANSI C Standard Library.........................................................................................10-5
Interrupt Service Routines for MicroC/OS-II............................................................................10-6
Implementing MicroC/OS-II Projects for the Nios II Processor........................................................10-6
Document Revision History for MicroC/OS-II Real-Time Operating System.................................10-6
Ethernet and the NicheStack TCP/IP Stack - Nios II Edition..........................11-1
Prerequisites for Understanding the NicheStack TCP/IP Stack......................................................... 11-1
Introduction to the NicheStack TCP/IP Stack - Nios II Edition.........................................................11-2
TOC-8
Altera Corporation