Specifications

Exception Handling
8
2015.05.14
NII5V2
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This chapter discusses how to write programs to handle exceptions in the Nios
®
II processor architecture.
Emphasis is placed on how to process hardware interrupt requests by registering a user-defined interrupt
service routine (ISR) with the hardware abstraction layer (HAL). This information applies to embedded
software projects created with the Nios II Software Build Tools (SBT), either in Eclipse or on the
command line.
For more information and low-level details about handling exceptions and hardware interrupts on the
Nios II architecture, refer to the "Programming Model" chapter.
Related Information
Programming Model
Nios II Exception Handling Overview
The Nios II processor provides the following exception types:
• Hardware interrupts
• Software exceptions, which fall into the following categories:
• Unimplemented instructions
• Software traps
• Miscellaneous exceptions
The Nios II processor offers two distinct approaches to handling hardware interrupts:
• The internal interrupt controller (IIC)
• The external interrupt controller (EIC) interface
The interrupt controllers are discussed in detail in the “Interrupt Controllers” chapter.
Related Information
Interrupt Controllers on page 8-3
Exception Handling Terminology
The following list of HAL terms outlines basic exception handling concepts:
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