Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History

4–20 Altera Corporation
Nios II Processor Reference Handbook October 2007
Document Revision History
Document
Revision History
Table 4–3 shows the revision history for this document.
Table 4–3. Document Revision History
Date & Document
Version
Changes Made Summary of Changes
October 2007
v7.2.0
Changed title to match other Altera documentation.
May 2007
v7.1.0
● Revised to reflect new MegaWizard interface.
● Added “Endian Converter Custom Instruction” on page 4–18
and “Bitswap Custom Instruction” on page 4–19.
● Added table of contents to Introduction section.
● Added Referenced Documents section.
March 2007
v7.0.0
No change from previous release.
November 2006
v6.1.0
● Add section on interrupt vector custom instruction.
● Add section on system-dependent Nios II processor settings.
May 2006
v6.0.0
● Added details on floating point custom instructions.
● Added section on Advanced Features tab.
October 2005
v5.1.0
No change from previous release.
May 2005
v5.0.0
● Updates to reflect new GUI options in Nios II processor
version 5.0.
● New details in “Caches and Tightly-Coupled Memory”
section.
September 2004
v1.1
● Updates to reflect new GUI options in Nios II processor
version 1.1.
● New details in section “Multiply and Divide Settings.”
May 2004
v1.0
Initial release.