Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History

Altera Corporation 4–19
October 2007 Nios II Processor Reference Handbook
Instantiating the Nios II Processor in SOPC Builder
f For details integrating the bitswap custom instruction into your own
algorithm, see the Nios II Custom Instruction User Guide.
Bitswap Custom Instruction
The Nios II processor core offers a bitswap custom instruction to reduce
the time spent performing bit reversal operations.
To add the bitswap custom instruction to the Nios II processor, select
Bitswap from the list, and click Add.
The bitswap custom instruction reverses a 32 bit value in a single clock
cycle. To perform the equivalent operation in software requires many
mask and shift operations.
f For details integrating the bitswap custom instruction into your own
algorithm, see the Nios II Custom Instruction User Guide.
Referenced
Documents
This chapter references the following documents:
■ Nios II Hardware Development Tutorial
■ Nios II Core Implementation Details chapter of the Nios II Processor
Reference Handbook
■ Programming Model chapter of the Nios II Processor Reference Handbook
■ Processor Architecture chapter of the Nios II Processor Reference
Handbook
■ Nios II Custom Instruction User Guide
■ Using Nios II Floating-Point Custom Instructions