Specifications

Altera Corporation 4–17
October 2007 Nios II Processor Reference Handbook
Instantiating the Nios II Processor in SOPC Builder
Floating Point Hardware Custom Instruction
The Nios II processor offers a set of optional predefined custom
instructions that implement floating-point arithmetic operations. You can
include these custom instructions to support computation-intensive
floating-point applications.
The basic set of floating-point custom instructions includes single
precision (32-bit) floating-point addition, subtraction, and multiplication.
Floating-point division is available as an extension to the basic instruction
set. The best choice for your hardware design depends on a balance
among floating-point usage, hardware resource usage, and performance.
If the target device includes on-chip multiplier blocks, the floating-point
custom instructions incorporate them as needed. If there are no on-chip
multiplier blocks, the floating-point custom instructions are entirely
based on general-purpose logic elements.
1 The opcode extensions for the floating-point custom
instructions are 252 through 255 (0xFC through 0xFF). These
opcode extensions cannot be modified.
To add the floating-point custom instructions to the Nios II processor,
select Floating Point Hardware from the list, and click Add. By default,
SOPC Builder includes floating-point addition, subtraction, and
multiplication, but omits the more resource intensive floating-point
division. The Nios II Floating Point Hardware dialog box, shown in
Figure 4–6, appears, giving you the option to include the floating-point
division hardware.