Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History
3–18 Altera Corporation
Nios II Processor Reference Handbook October 2007
Instruction Set Categories
Shift and Rotate Instructions
The following instructions provide shift and rotate operations. The
number of bits to rotate or shift can be specified in a register or an
immediate value. See Table 3–10.
cmple
unsigned <=
cmpleu
unsigned <=
cmplt
signed <
cmpltu
unsigned <
cmpeqi
cmpnei
cmpgei
cmpgeui
cmpgti
cmpgtui
cmplei
cmpleui
cmplti
cmpltui
These instructions are immediate versions of the comparison
operations. They compare the value of a register and a 16-bit
immediate value. Signed operations sign-extend the
immediate value to 32-bits. Unsigned operations fill the upper
bits with zero.
Table 3–9. Comparison Instructions (Part 2 of 2)
Instruction Description
Table 3–10. Shift and Rotate Instructions
Instruction Description
rol
ror
roli
The rol and roli instructions provide left bit-rotation. roli uses an immediate value to specify
the number of bits to rotate. The
ror instructions provides right bit-rotation.
There is no immediate version of
ror, because roli can be used to implement the equivalent
operation.
sll
slli
sra
srl
srai
srli
These shift instructions implement the << and >> operators of the C programming language. The
sll, slli, srl, srli instructions provide left and right logical bit-shifting operations, inserting
zeros. The
sra and srai instructions provide arithmetic right bit-shifting, duplicating the sign bit
in the most significant bit.
slli, srli and srai use an immediate value to specify the number
of bits to shift.