Specifications

Altera Corporation 3–11
October 2007 Nios II Processor Reference Handbook
Programming Model
Other Exceptions
The previous sections describe all of the exception types defined by the
Nios II architecture at the time of publishing. However, some processor
implementations might generate exceptions that do not fall into the above
categories. For example, a future implementation might provide a
memory management unit (MMU) that generates access violation
exceptions. Therefore, a robust exception handler should provide a safe
response (such as issuing a warning) in the event that it cannot exactly
identify the cause of an exception.
Processing Interrupt and Instruction-Related Exceptions
This section describes the actions the processor takes in response to
interrupt and instruction-related exceptions, except for the break
instruction (see “Processing a Break” on page 3–7). An exception causes
the processor to take the following steps:
1. Copies the contents of the status control register to estatus
saving the processor’s pre-exception status.
2. Clears the PIE bit of the status register, disabling external
processor interrupts
3. Writes the address of the instruction following the exception to the
ea register (r29)
4. Transfers execution to the exception handler which determines the
cause of the interrupt.
The general exception handler is a routine that determines the cause of
each exception, and then dispatches an appropriate exception routine to
respond to the execption. The address of the general exception handler,
called the exception vector in the GUI, is specified at system generation
time. At run time this address is fixed, and software cannot modify it.
Programmers do not directly access exception vectors, and can write
programs without awareness of the address.
f For a detailed discussion of writing programs to take advantage of
exception and interrupt handling, see the Exception Handling chapter of
the Nios II Software Developer’s Handbook.