Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History
Altera Corporation 2–5
October 2007 Nios II Processor Reference Handbook
Processor Architecture
Floating Point Instructions
The Nios II architecture supports single precision floating point
instructions as specified by the IEEE Std 754-1985. These floating point
instructions are implemented as custom instructions. Table 2–2 provides
a detailed description of the conformance to IEEE 754-1985.
Table 2–2. Hardware Conformance with IEEE 754-1985 Floating Point
Feature Implementation
Operations
(1)
Addition Implemented
Subtraction Implemented
Multiplication Implemented
Division Optional
Precision Single Implemented
Double Not implemented. Double precision operations are
implemented in software.
Exception conditions Invalid operation Result is Not a Number (NaN)
Division by zero Result is ±infinity
Overflow Result is ±infinity
Inexact Result is a normal number
Underflow
Result is ±0
Rounding Modes Round to nearest Implemented
Round toward zero Not implemented
Round toward +infinity Not implemented
Round toward -infinity Not implemented
NaN Quiet Implemented
Signaling Not implemented
Subnormal
(denormalized)
numbers
Subnormal operands are treated as zero. The floating point
custom instructions do not generate subnormal numbers.
Software exceptions Not implemented. IEEE 754-1985 exception conditions are
detected and handled as shown elsewhere in this table.
Status flags Not implemented. IEEE 754-1985 exception conditions are
detected and handled as shown elsewhere in this table.
Notes to: Table 2–2
(1) The Nios II IDE generates a software implementation of primitive floating point operations other than addition,
subtraction, multiplication, and division. This includes operations such as floating point conversions and
comparisons. The software implementations of these primitives are 100% compliant with IEEE 754-1985.