Specifications

8–74 Altera Corporation
Nios II Processor Reference Handbook October 2007
mulxsu
mulxsu
multiply extended signed/unsigned
Operation:
rC
←
((signed) rA) × ((unsigned) rB))
63..32
Assembler Syntax:
mulxsu rC, rA, rB
Example:
mulxsu r6, r7, r8
Description:
Treating rA as a signed integer and rB as an unsigned integer,
mulxsu multiplies rA
times rB, and stores the 32 high-order bits of the product to rC.
Nios II processors that do not implement the
mulxsu instruction cause an
unimplemented-instruction exception.
Usage:
mulxsu can be used as part of the calculation of a 128-bit product of two 64-bit signed
integers. Given two 64-bit integers, each contained in a pair of 32-bit registers, (S1 :
U1) and (S2 : U2), their 128-bit product is: (U1 × U2) + ((S1 × U2) << 32) + ((U1 × S2)
<< 32) + ((S1 × S2) << 64). The
mulxsu and mul instructions are used to calculate
the two 64-bit products S1 × U2 and U1 × S2.
Instruction Type: R
Instruction Fields: A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
313029282726252423222120191817161514131211109876543210
ABC0x1700x3a