Specifications

1–4 Altera Corporation
Nios II Processor Reference Handbook October 2007
Configurable Soft-Core Processor Concepts
Because the pins and logic resources in Altera devices are programmable,
many customizations are possible:
■ You can rearrange the pins on the chip simplify the board design. For
example, you can move address and data pins for external SDRAM
memory to any side of the chip to shorten board traces.
■ You can use extra pins and logic resources on the chip for functions
unrelated to the processor. Extra resources can provide a few extra
gates and registers as “glue logic” for the board design; or extra
resources can implement entire systems. For example, a Nios II
processor system consumes only 5% of a large Altera FPGA, leaving
the rest of the chip’s resources available to implement other
functions.
■ You can use extra pins and logic on the chip to implement additional
peripherals for the Nios II processor system. Altera offers a library of
peripherals that easily connect to Nios II processor systems.
Configurable
Soft-Core
Processor
Concepts
This section introduces Nios II concepts that are unique or different from
other discrete microcontrollers. The concepts described in this section
provide a foundation for understanding the rest of the features discussed
in this document.
For the most part, these concepts relate to the flexibility available to
hardware designers to fine-tune system implementation. Software
programmers generally are not affected by the hardware implementation
details, and can write programs without awareness of the configurable
nature of the Nios II processor core.
Configurable Soft-Core Processor
The Nios II processor is a configurable soft-core processor, as opposed to
a fixed, off-the-shelf microcontroller. In this context, “configurable”
means that you can add or remove features on a system-by-system basis
to meet performance or price goals. “Soft-core” means the processor core
is offered in “soft” design form (i.e., not fixed in silicon), and can be
targeted to any Altera FPGA family.
Configurability does not require you to create a new Nios II processor
configuration for every new design. Altera provides ready-made Nios II
system designs that you can use as-is. If these designs meet the system
requirements, there is no need to configure the design further. In addition,
software designers can use the Nios II instruction set simulator to begin
writing and debugging Nios II applications before the final hardware
configuration is determined.