Specifications

8–54 Altera Corporation
Nios II Processor Reference Handbook October 2007
flushda
flushda
flush data cache address
Operation: Flushes the data cache line currently caching address rA + σ (IMM16)
Assembler Syntax:
flushda IMM16(rA)
Example:
flushda -100(r6)
Description:
If the addressed data is currently cached,
flushda flushes the cache line mapped to
that address. This entails the following steps:
● Computes the effective address specified by the sum of rA and the signed 16-bit
immediate value
● Identifies the data cache line associated with the computed effective address.
● Compares the cache line tag with the effective address. If they do not match, the
effective address is not cached, and the instruction does nothing.
● If the tag matches, and the data cache contains dirty data, writes the dirty cache
line back to memory.
● Clears the valid bit for the line
A cache line is dirty when one or more words of the cache line have been modified by
the processor, but are not yet written to memory.
If the Nios II processor core does not have a data cache, the
flushda instruction
performs no operation.
Usage:
flushda flushes the cache line only if the addressed memory location is currently
cached. By contrast, the
flushd instruction flushes the cache line even if the
addressed memory location is not cached.
For more information on the Nios II data cache, see the Cache and Tightly-Coupled
Memory chapter of the Nios II Software Developer's Handbook.
Instruction Type: I
Instruction Fields: A = Register index of operand rA
IMM16 = 16-bit signed immediate value
313029282726252423222120191817161514131211109876543210
A 0 IMM16 0x1b