Specifications

Altera Corporation 8–53
October 2007 Nios II Processor Reference Handbook
flushd
flushd
flush data cache line
Operation: Flushes the data cache line associated with address rA + σ (IMM16).
Assembler Syntax:
flushd IMM16(rA)
Example:
flushd -100(r6)
Description:
If the Nios II processor implements a direct mapped data cache,
flushd flushes the
cache line that is mapped to the specified address, regardless whether the addressed
data is currently cached. This entails the following steps:
● Computes the effective address specified by the sum of rA and the signed 16-bit
immediate value
● Identifies the data cache line associated with the computed effective address.
flushd ignores the cache line tag, which means that it flushes the cache line
regardless whether the specified data location is currently cached
● If the line is dirty, writes the line back to memory
● Clears the valid bit for the line
A cache line is dirty when one or more words of the cache line have been modified by
the processor, but are not yet written to memory.
If the Nios II processor core does not have a data cache, the
flushd instruction
performs no operation.
Usage:
flushd flushes the cache line even if the addressed memory location is not in the
cache. By contrast, the
flushda instruction does nothing if the addressed memory
location is not in the cache.
For more information on data cache, see the Cache and Tightly-Coupled Memory
chapter of the Nios II Software Developer's Handbook.
Instruction Type: I
Instruction Fields: A = Register index of operand rA
IMM16 = 16-bit signed immediate value
313029282726252423222120191817161514131211109876543210
A 0 IMM16 0x3b