Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History

1–2 Altera Corporation
Nios II Processor Reference Handbook October 2007
Getting Started with the Nios II Processor
A Nios II processor system is equivalent to a microcontroller or
“computer on a chip” that includes a processor and a combination of
peripherals and memory on a single chip. The term “Nios II processor
system” refers to a Nios II processor core, a set of on-chip peripherals, on-
chip memory, and interfaces to off-chip memory, all implemented on a
single Altera device. Like a microcontroller family, all Nios II processor
systems use a consistent instruction set and programming model.
Getting Started
with the Nios II
Processor
Getting started with the Nios II processor is similar to any other
microcontroller family. The easiest way to start designing effectively is to
purchase a development kit from Altera that includes a ready-made
evaluation board and all the software development tools necessary to
write Nios II software.
The Nios II software development environment is called The Nios II
integrated development environment (IDE). The Nios II IDE is based on
the GNU C/C++ compiler and the Eclipse IDE, and provides a familiar
and established environment for software development. Using the
Nios II IDE, you can immediately begin developing and simulating
Nios II software applications. The Nios II software build tools also
provide a command line interface. Using the Nios II hardware reference
designs included in an Altera development kit, you can prototype an
application running on a board before building a custom hardware
platform. Figure 1–1 shows an example of a Nios II processor reference
design available in an Altera Nios II development kit.