Specifications

8–50 Altera Corporation
Nios II Processor Reference Handbook October 2007
div
div
divide
Operation:
rC
←
rA ÷ rB
Assembler Syntax:
div rC, rA, rB
Example:
div r6, r7, r8
Description: Treating rA and rB as signed integers, this instruction divides rA by rB and then stores
the integer portion of the resulting quotient to rC. After attempted division by zero, the
value of rC is undefined. There is no divide-by-zero exception. After dividing
–2147483648 by –1, the value of rC is undefined (the number [phone] is not
representable in 32 bits). There is no overflow exception.
Nios II processors that do not implement the
div instruction cause an
unimplemented-instruction exception.
Usage: Remainder of Division:
If the result of the division is defined, then the remainder can be computed in rD using
the following instruction sequence:
div rC, rA, rB
mul rD, rC, rB
sub rD, rA, rD
; The original div operation
; rD = remainder
Instruction Type: R
Instruction Fields: A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
313029282726252423222120191817161514131211109876543210
ABC0x2500x3a