Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History

8–10 Altera Corporation
Nios II Processor Reference Handbook October 2007
addi
addi
add immediate
Operation:
rB
←
rA + σ (IMM16)
Assembler Syntax:
addi rB, rA, IMM16
Example:
addi r6, r7, -100
Description: Sign-extends the 16-bit immediate value and adds it to the value of rA. Stores the sum
in rB.
Usage: Carry Detection (unsigned operands):
Following an
addi operation, a carry out of the MSB can be detected by checking
whether the unsigned sum is less than one of the unsigned operands. The carry bit
can be written to a register, or a conditional branch can be taken based on the carry
condition. Both cases are shown below.
addi rB, rA, IMM16
cmpltu rD, rB, rA
addi rB, rA, IMM16
bltu rB, rA, label
; The original add operation
; rD is written with the carry bit
; The original add operation
; Branch if carry was generated
Overflow Detection (signed operands):
An overflow is detected when two positives are added and the sum is negative, or
when two negatives are added and the sum is positive. The overflow condition can
control a conditional branch, as shown below.
addi rB, rA, IMM16
xor rC, rB, rA
xorhi rD, rB, IMM16
and rC, rC, rD
blt rC, r0,label
; The original add operation
; Compare signs of sum and rA
; Compare signs of sum and IMM16
; Combine comparisons
; Branch if overflow occurred
Instruction Type: I
Instruction Fields: A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit signed immediate value
313029282726252423222120191817161514131211109876543210
A B IMM16 0x04