Specifications
Table Of Contents
- Nios II Processor Reference Handbook
- Contents
- Chapter Revision Dates
- About This Handbook
- Section I. Nios II Processor
- 1. Introduction
- 2. Processor Architecture
- 3. Programming Model
- Introduction
- General- Purpose Registers
- Control Registers
- Operating Modes
- Exception Processing
- Memory and Peripheral Access
- Instruction Set Categories
- Referenced Documents
- Document Revision History
- 4. Instantiating the Nios II Processor in SOPC Builder
- Section II. Appendices
- 5. Nios II Core Implementation Details
- Introduction
- Device Family Support
- Nios II/f Core
- Nios II/s Core
- Nios II/e Core
- Referenced Documents
- Document Revision History
- 6. Nios II Processor Revision History
- 7. Application Binary Interface
- 8. Instruction Set Reference
- Introduction
- Word Formats
- Instruction Opcodes
- Assembler Pseudo- instructions
- Assembler Macros
- Instruction Set Reference
- add
- addi
- and
- andhi
- andi
- beq
- bge
- bgeu
- bgt
- bgtu
- ble
- bleu
- blt
- bltu
- bne
- br
- break
- bret
- call
- callr
- cmpeq
- cmpeqi
- cmpge
- cmpgei
- cmpgeu
- cmpgeui
- cmpgt
- cmpgti
- cmpgtu
- cmpgtui
- cmple
- cmplei
- cmpleu
- cmpleui
- cmplt
- cmplti
- cmpltu
- cmpltui
- cmpne
- cmpnei
- custom
- div
- divu
- eret
- flushd
- flushda
- flushi
- flushp
- initd
- initi
- jmp
- jmpi
- ldb / ldbio
- ldbu / ldbuio
- ldh / ldhio
- ldhu / ldhuio
- ldw / ldwio
- mov
- movhi
- movi
- movia
- movui
- mul
- muli
- mulxss
- mulxsu
- mulxuu
- nextpc
- nop
- nor
- or
- orhi
- ori
- rdctl
- ret
- rol
- roli
- ror
- sll
- slli
- sra
- srai
- srl
- srli
- stb / stbio
- sth / sthio
- stw / stwio
- sub
- subi
- sync
- trap
- wrctl
- xor
- xorhi
- xori
- Referenced Documents
- Document Revision History

Altera Corporation 8–9
October 2007 Nios II Processor Reference Handbook
add
add
add
Operation:
rC
←
rA + rB
Assembler Syntax:
add rC, rA, rB
Example:
add r6, r7, r8
Description: Calculates the sum of rA and rB. Stores the result in rC. Used for both signed and
unsigned addition.
Usage: Carry Detection (unsigned operands):
Following an
add operation, a carry out of the MSB can be detected by checking
whether the unsigned sum is less than one of the unsigned operands. The carry bit
can be written to a register, or a conditional branch can be taken based on the carry
condition. Both cases are shown below.
add rC, rA, rB
cmpltu rD, rC, rA
add rC, rA, rB
bltu rC, rA, label
; The original add operation
; rD is written with the carry bit
; The original add operation
; Branch if carry was generated
Overflow Detection (signed operands):
An overflow is detected when two positives are added and the sum is negative, or
when two negatives are added and the sum is positive. The overflow condition can
control a conditional branch, as shown below.
add rC, rA, rB
xor rD, rC, rA
xor rE, rC, rB
and rD, rD, rE
blt rD, r0,label
; The original add operation
; Compare signs of sum and rA
; Compare signs of sum and rB
; Combine comparisons
; Branch if overflow occurred
Instruction Type: R
Instruction Fields: A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A B C 0x31 0 0x3a