Specifications

8–6 Altera Corporation
Nios II Processor Reference Handbook October 2007
Assembler Pseudo-instructions
Assembler
Pseudo-
instructions
Table 8–3 lists pseudoinstructions available in Nios II assembly language.
Pseudoinstructions are used in assembly source code like regular
assembly instructions. Each pseudoinstruction is implemented at the
machine level using an equivalent instruction. The movia
pseudoinstruction is the only exception, being implemented with two
instructions. Most pseudoinstructions do not appear in disassembly
views of machine code.
Table 8–3. Assembler Pseudoinstructions
Pseudoinstruction Equivalent Instruction
bgt rA, rB, label blt rB, rA, label
bgtu rA, rB, label bltu rB, rA, label
ble rA, rB, label bge rB, rA, label
bleu rA, rB, label bgeu rB, rA, label
cmpgt rC, rA, rB cmplt rC, rB, rA
cmpgti rB, rA, IMMED cmpgei rB, rA, (IMMED+1)
cmpgtu rC, rA, rB cmpltu rC, rB, rA
cmpgtui rB, rA, IMMED cmpgeui rB, rA, (IMMED+1)
cmple rC, rA, rB cmpge rC, rB, rA
cmplei rB, rA, IMMED cmplti rB, rA, (IMMED+1)
cmpleu rC, rA, rB cmpgeu rC, rB, rA
cmpleui rB, rA, IMMED cmpltui rB, rA, (IMMED+1)
mov rC, rA add rC, rA, r0
movhi rB, IMMED orhi rB, r0, IMMED
movi rB, IMMED addi, rB, r0, IMMED
movia rB, label orhi rB, r0, %hiadj(label)
addi, rB, r0, %lo(label)
movui rB, IMMED ori rB, r0, IMMED
nop add r0, r0, r0
subi, rB, rA, IMMED addi rB, rA, IMMED