Specifications

7–2 Altera Corporation
Nios II Processor Reference Handbook User Guide October 2007
Memory Alignment
Memory
Alignment
Contents in memory are aligned as follows:
■ A function must be aligned to a minimum of 32-bit boundary.
■ The minimum alignment of a data element is its natural size. A data
element larger than 32-bits need only be aligned to a 32-bit boundary.
■ Structures, unions, and strings must be aligned to a minimum of
32 bits.
■ Bit-fields inside structures are always 32-bit aligned.
Register Usage
The ABI adds additional usage conventions to the Nios II register file
defined in the Programming Model chapter of the Nios II Processor Reference
Handbook. The ABI uses the registers as shown in Table 7–2.
Table 7–2. Nios II ABI Register Usage (Part 1 of 2)
Register Name
Used by
Compiler
Callee Saved
(1)
Normal Usage
r0 zero
v 0x00000000
r1 at
Assembler Temporary
r2
v Return Value (Least-significant 32 bits)
r3
v Return Value (Most-significant 32 bits)
r4
v Register Arguments (First 32 bits)
r5
v Register Arguments (Second 32 bits)
r6
v Register Arguments (Third 32 bits)
r7
v Register Arguments (Fourth 32 bits)
r8
v Caller-Saved General-Purpose Registers
r9
v
r10
v
r11
v
r12
v
r13
v
r14
v
r15
v