Specifications

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About This Handbook
Introduction
This handbook is the primary reference for the Nios
®
II family of
embedded processors. The handbook describes the Nios II processor
from a high-level conceptual description to the low-level details of
implementation. The chapters in this handbook define the Nios II
processor architecture, the programming model, the instruction set, and
more.
This handbook is part of a larger collection of documents covering the
Nios II processor and its usage. See “How to Find Further Information”
on page 1–xii.
Prerequisites
This handbook assumes you have a basic familiarity with embedded
processor concepts. You do not need to be familiar with any specific
Altera
®
technology or with Altera development tools. This handbook
intentionally minimizes discussion of hardware implementation details
of the processor system. That said, the Nios II processors are designed for
Altera field programmable gate array (FPGA) devices, and so this
handbook does describe some FPGA implementation concepts. Your
familiarity with FPGA technology provides a deeper understanding of
the engineering trade-offs related to the design and implementation of
the Nios II processor.