Specifications

Fast TLB miss
Double TLB miss
TLB permission violation
MPU region violation
Note: All noninterrupt exception handlers must run in the normal register set.
Related Information
Exception Processing Flow on page 3-49
Trap Instruction
When a program issues the trap instruction, the processor generates a software trap exception. A
program typically issues a software trap when the program requires servicing by the operating system.
The general exception handler for the operating system determines the reason for the trap and responds
appropriately.
Break Instruction
The break instruction is treated as a break exception. For more information, refer to the "Break
Exceptions" section of this chapter.
Related Information
Break Exceptions on page 3-40
Unimplemented Instruction
When the processor issues a valid instruction that is not implemented in hardware, an unimplemented
instruction exception is generated. The general exception handler determines which instruction generated
the exception. If the instruction is not implemented in hardware, control is passed to an exception routine
that might choose to emulate the instruction in software.
For more information, refer to the "Potential Unimplemented Instructions" section of this chapter.
Related Information
Potential Unimplemented Instructions on page 3-65
Illegal Instruction
Illegal instructions are instructions with an undefined opcode or opcode-extension field. The Nios II
processor can check for illegal instructions and generate an exception when an illegal instruction is
encountered. When your system contains an MMU or MPU, illegal instruction checking is always on.
When no MMU or MPU is present, you have the option to have the processor check for illegal instruc‐
tions.
For information about controlling this option, refer to the Instantiating the Nios II Processor chapter of
the Nios II Processor Reference Handbook.
When the processor issues an instruction with an undefined opcode or opcode-extension field, and illegal
instruction exception checking is turned on, an illegal instruction exception is generated.
Refer to the OP Encodings and OPX Encodings for R-Type Instructions tables in the Instruction Set
Reference chapter of the Nios II Processor Reference Handbook to see the unused opcodes and opcode
extensions.
NII51003
2015.04.02
Trap Instruction
3-45
Programming Model
Altera Corporation
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