Specifications

Exception Type Available Cause Address Vector
Supervisor-only
instruction
Instruction-
related
MMU or
MPU
10 ea–4
(15)
General exception
Trap instruction Instruction-
related
Always 3 ea–4
(15)
General exception
Illegal instruction Instruction-
related
Illegal
instruction
detection on,
MMU, or
MPU
5 ea–4
(15)
General exception
Unimplemented
instruction
Instruction-
related
Always 4 ea–4
(15)
General exception
Break instruction Instruction-
related
Always — ba–4
(15)
Break
Supervisor-only data
address
Instruction-
related
MMU 11 badaddr (data
address)
General exception
Misaligned data
address
Instruction-
related
Illegal
memory
access
detection on,
MMU, or
MPU
6 badaddr (data
address)
General exception
Misaligned destina‐
tion address
Instruction-
related
Illegal
memory
access
detection on,
MMU, or
MPU
7 badaddr
(destination
address)
General exception
ECC TLB error
(data)
Instruction-
related
MMU and
ECC
18 badaddr (data
address)
General exception
Division error Instruction-
related
Division error
detection on
8 ea–4
(15)
General exception
Fast TLB miss (data) Instruction-
related
MMU 12 pteaddr.VPN,
badaddr (data
address)
Fast TLB Miss
exception
Double TLB miss
(data)
Instruction-
related
MMU 12 pteaddr.VPN,
badaddr (data
address)
General exception
TLB permission
violation (read)
Instruction-
related
MMU 14 pteaddr.VPN,
badaddr (data
address)
General exception
TLB permission
violation (write)
Instruction-
related
MMU 15 pteaddr.VPN,
badaddr (data
address)
General exception
3-38
Exception Overview
NII51003
2015.04.02
Altera Corporation
Programming Model
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