Specifications

MPU region write operations set new values for the attributes of a region. Each MPU region write
operation consists of the following actions:
• Execute a wrctl instruction to the mpubase register with the mpubase.INDEX and mpubase.D fields set
to identify the MPU region.
• Execute a wrctl instruction to the mpuacc register with the mpuacc.WR field set to one and the
mpuacc.RD field cleared to zero.
The MPU region write operation sets the values for mpubase.BASE, mpuacc.MASK or mpuacc.LIMIT,
mpuacc.C, and mpuacc.PERM as the new attributes for the MPU region.
Normally, a wrctl instruction flushes the pipeline to guarantee that any side effects of writing control
registers take effect immediately after the wrctl instruction completes execution. However, wrctl
instructions to the mpubase and mpuacc control registers do not automatically flush the pipeline. Instead,
system software is responsible for flushing the pipeline as needed (either by using a flushp instruction or
a wrctl instruction to a register that does flush the pipeline). Because a context switch typically requires
reprogramming the MPU regions for the new thread, flushing the pipeline on each wrctl instruction
would create unnecessary overhead.
MPU Initialization
Your system software must provide a data structure that contains the region information described in the
"Memory Regions" section of this chapter for each active thread. The data structure ideally contains two
32-bit values that correspond to the mpubase and mpuacc register formats.
The MPU is disabled on system reset. Before enabling the MPU, Altera recommends initializing all MPU
regions. Enable desired instruction and data regions by writing each region’s attributes to the mpubase
and mpuacc registers as described in the "MPU Region Read and Write Operations" section of this
chapter. You must also disable unused regions. When using region size, clear mpuacc.MASK to zero. When
using limit, set the mpubase.BASE to a nonzero value and clear mpuacc.LIMIT to zero.
Note:
You must enable at least one instruction and one data region, otherwise unpredictable behavior
might occur.
To perform a context switch, use a wrctl to write a zero to the PE field of the config register to disable
the MPU, define all MPU regions from the new thread’s data structure, and then use another wrctl to
write a one to config.PE to enable the MPU.
Define each region using the pair of wrctl instructions described in the "MPU Region Read and Write
Operations" section of this chapter. Repeat this dual wrctl instruction sequence until all desired regions
are defined.
Related Information
• MPU Region Read and Write Operations on page 3-32
• Memory Regions on page 3-8
Debugger Access
The debugger can access all MPU-related control registers using the normal wrctl and rdctl
instructions. During debugging, the Nios II ignores the MPU, effectively temporarily disabling it.
NII51003
2015.04.02
MPU Initialization
3-33
Programming Model
Altera Corporation
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