Specifications

Programming Model
3
2015.04.02
NII51003
Subscribe
Send Feedback
This chapter describes the Nios
®
II programming model, covering processor features at the assembly
language level. Fully understanding the contents of this chapter requires prior knowledge of computer
architecture, operating systems, virtual memory and memory management, software processes and
process management, exception handling, and instruction sets. This chapter assumes you have a detailed
understanding of these concepts and focuses on how these concepts are specifically implemented in the
Nios II processor. Where possible, this chapter uses industry-standard terminology.
Note: Because of the flexibility and capability range of the Nios II processor, this chapter covers topics
that support a variety of operating systems and runtime environments. While reading, be aware
that all sections might not apply to you. For example, if you are using a minimal system runtime
environment, you can ignore the sections covering operating modes, the MMU, the MPU, or the
control registers exclusively used by the MMU and MPU.
Related Information
Nios II Software Developer's Handbook
High-level software development tools are not discussed here. Refer to the Nios II Software Developer’s
Handbook for information about developing software.
Operating Modes
Operating modes control how the processor operates, manages system memory, and accesses peripherals.
The Nios II architecture supports these operating modes:
• Supervisor mode
• User mode
The following sections define the modes, their relationship to your system software and application code,
and their relationship to the Nios II MMU and Nios II MPU.
Supervisor Mode
Supervisor mode allows unrestricted operation of the processor. All code has access to all processor
instructions and resources. The processor may perform any operation the Nios II architecture provides.
Any instruction may be executed, any I/O operation may be initiated, and any area of memory may be
accessed.
Operating systems and other system software run in supervisor mode. In systems with an MMU, applica‐
tion code runs in user mode, and the operating system, running in supervisor mode, controls the applica‐
©
2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
ISO
9001:2008
Registered
www.altera.com
101 Innovation Drive, San Jose, CA 95134