Specifications

Usage
jmpi is a low-overhead local jump. jmpi can transfer execution
anywhere within the 256-MB range determined by PC
31..28
. The
Nios II GNU linker does not automatically handle cases in
which the address is out of this range.
Exceptions
None
Instruction Type
J
Instruction Fields
IMM26 = 26-bit unsigned immediate value
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
IMM26
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IMM26 0x01
ldb / ldbio
Instruction
load byte from memory or I/O peripheral
Operation
rB ← σ(Mem8[rA + σ(IMM16)])
Assembler Syntax
ldb rB, byte_offset(rA)
ldbio rB, byte_offset(rA)
Example
ldb r6, 100(r5)
Description
Computes the effective byte address specified by the sum of rA
and the instruction's signed 16-bit immediate value. Loads
register rB with the desired memory byte, sign extending the 8-
bit value to 32 bits. In Nios II processor cores with a data cache,
this instruction may retrieve the desired data from the cache
instead of from memory.
Usage
Use the ldbio instruction for peripheral I/O. In processors
with a data cache, ldbio bypasses the cache and is guaranteed
to generate an Avalon-MM data transfer. In processors without
a data cache, ldbio acts like ldb.
For more information on data cache, refer to the Cache and
Tightly Coupled Memory chapter of the Nios II Software
Developer’s Handbook.
8-48
ldb / ldbio
NII51017
2015.04.02
Altera Corporation
Instruction Set Reference
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