Specifications

Custom Instructions
The Nios II architecture supports user-defined custom instructions. The Nios II ALU connects directly to
custom instruction logic, enabling you to implement operations in hardware that are accessed and used
exactly like native instructions.
Refer to "Custom Instruction Tab" in the Instantiating the Nios II Processor chapter of the Nios II Processor
Reference Handbook for additional information.
Related Information
• Instantiating the Nios II Processor on page 4-1
• Instantiating the Nios II Processor
• Nios II Custom Instruction User Guide
For more information, refer to the Nios II Custom Instruction User Guide.
Floating-Point Instructions
The Nios II architecture supports single precision floating-point instructions with two components:
• Floating Point Hardware 2—This component supports floating-point instructions as specified by the
IEEE Std 754-2008 but with simplified, non-standard rounding modes. The basic set of floating-point
custom instructions includes single precision floating-point addition, subtraction, multiplication,
division, square root, integer to float conversion, float to integer conversion, minimum, maximum,
negate, absolute, and comparisons.
• Floating Point Hardware—This component supports floating-point instructions as specified by the
IEEE Std 754-1985. The basic set of floating-point custom instructions includes single precision
floating-point addition, subtraction, and multiplication. Floating-point division is available as an
extension to the basic instruction set.
These floating-point instructions are implemented as custom instructions. The Hardware Conformance
table below lists a detailed description of the conformance to the IEEE standards.
NII51002
2015.04.02
Custom Instructions
2-5
Processor Architecture
Altera Corporation
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