Specifications

Version Release Date Notes
5.0 May 2005 Support for HardCopy devices (previous versions of the JTAG debug
module did not support HardCopy devices).
1.1 December
2004
Bug fix:
When using the Nios II/s and Nios II/f cores, hardware breakpoints
may have falsely triggered when placed on the instruction sequentially
following a jmp, trap, or any branch instruction.
1.01 September
2004
• Feature enhancements:
(1) Added the ability to trigger based on the instruction address.
Uses include triggering trace control (trace on/off), sequential
triggers, and trigger in/out signal generation.
(2) Enhanced trace collection such that collection can be stopped
when the trace buffer is full without halting the Nios II processor.
(3) Armed triggers – Enhanced trigger logic to support two levels of
triggers, or "armed triggers"; enabling the use of "Event A then
event B" trigger definitions.
• Bug fixes:
(1) On the Nios II/s core, trace data sometimes recorded incorrect
addresses during interrupt processing.
(2) Under certain circumstances, captured trace data appeared to
start earlier or later than the desired trigger location.
(3) During debugging, the processor would hang if a hardware
breakpoint and an interrupt occurred simultaneously.
1.0
May 2004 Initial release of the JTAG debug module.
Document Revision History
Table 6-7: Document Revision History
Date Version Changes
April 2015 2015.04.02 Maintenance release.
February 2014 13.1.0
• Added information on ECC support.
• Removed HardCopy information.
• Removed references to SOPC Builder.
May 2011 11.0.0 Maintenance release.
December 2010 10.1.0 Maintenance release.
July 2010 10.0.0 Maintenance release.
November 2009 9.1.0
• Added external interrupt controller interface information.
• Added shadow register set information.
NII51018
2015.04.02
Document Revision History
6-9
Nios II Processor Revision History
Altera Corporation
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