Specifications

Version Release Date Notes
1.1 December
2004
• Added user-configurable options affecting multiply and shift
operations. Now designers can choose one of three options:
(1) Use embedded multiplier resources available in the target
device family (previously available).
(2) Use logic elements to implement multiply and shift hardware
(new option).
(3) Omit multiply hardware. Shift operations take one cycle per bit
shifted; multiply operations are emulated in software (new option).
• Added user-configurable option to include divide hardware in the
ALU. Previously this option was available for only the Nios II/f
core.
• Added cpuid control register.
1.01 September
2004
Bug fix:
The SOPC Builder top-level system module included an extra,
unnecessary output port for systems with very small address spaces.
1.0 May 2004 Initial release of the Nios II/s core.
Nios II/e Core
Table 6-5: Nios II/e Core Revisions
Version Release Date Notes
13.1 November
2013
• Added support for enhanced floating-point custom instructions
11.0 May 2011 No changes.
10.1 December
2010
No changes.
10.0 July 2010 No changes.
9.1 November
2009
No changes.
9.0 March 2009 No changes.
8.1 November
2008
No changes.
8.0 May 2008 Implemented the illegal instruction exception.
7.2 October 2007 Implemented the jmpi instruction.
7.1 May 2007 No changes.
7.0 March 2007 No changes.
NII51018
2015.04.02
Nios II/e Core
6-7
Nios II Processor Revision History
Altera Corporation
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