Specifications

To add the floating-point custom instructions to the Nios II processor in Qsys, select Floating Point
Hardware under Custom Instruction Modules on the Component Library tab, and click Add. By
default, Qsys includes floating-point addition, subtraction, and multiplication, but omit the more resource
intensive floating-point division. The Floating Point Hardware parameter editor appears, giving you the
option to include the floating-point division hardware.
Table 4-8: Floating Point Hardware Parameters
Name Values Description
Use floating point division
hardware
On/Off Specifies inclusion of floating-point division
hardware.
Turn on Use floating point division hardware to include floating-point division hardware. The floating-
point division hardware requires more resources than the other instructions, so you might wish to omit it
if your application does not make heavy use of floating-point division.
Click Finish to add the floating-point custom instructions to the Nios II processor.
For more information about the floating-point custom instructions, refer to the Processor Architecture
chapter of the Nios II Processor Reference Handbook.
Related Information
• Processor Architecture on page 2-1
• Processor Architecture
Bitswap Custom Instruction
The Nios II processor core offers a bitswap custom instruction to reduce the time spent performing bit
reversal operations.
To add the bitswap custom instruction to the Nios II processor in Qsys, select Bitswap under Custom
Instruction Modules on the Component Library tab, and click Add.
The bitswap custom instruction reverses a 32-bit value in a single clock cycle. To perform the equivalent
operation in software requires many mask and shift operations.
For details about integrating the bitswap custom instruction into your own algorithm, refer to the Nios II
Custom Instruction User Guide.
Related Information
Nios II Custom Instruction User Guide
The Quartus II IP File
The Quartus
®
II IP file (.qip) is a file generated by the MegaWizard
™
Plug-In Manager, that contains
information about a generated IP core. You are prompted to add this .qip file to the current project at the
time of Quartus II file generation. In most cases, the .qip file contains all of the necessary assignments and
information required to process the core or system in the Quartus II compiler. Generally, a single .qip file
is generated for each MegaCore function and for each Qsys system. However, some complex components
generate a separate .qip file, so the system .qip file references the component .qip file.
4-18
Bitswap Custom Instruction
NII51004
2015.04.02
Altera Corporation
Instantiating the Nios II Processor
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