Specifications
Debug Feature No Debug Level 1 Level 2 Level 3 Level 4
(39)
Download Software No Yes Yes Yes Yes
Software Breakpoints None Unlimited Unlimited Unlimited Unlimited
Hardware Execution
Breakpoints
0 None 2 2 4
Data Triggers 0 None 2 2 4
On-Chip Trace 0 None None Up to 64-KB
frames
(41)
Up to 64-
KB frames
Off-Chip Trace
(42)
0 None None None 128-KB
frames
For information about debug features available from these third parties, search for “Nios II” on the
Imagination Technologies website and the Lauterbach GmbH website.
Related Information
• Lauterbach GmbH
• Imagination Technologies, LLC
Debug Signals
The Include debugreq and debugack signals debug signals setting provides the following functionality.
When on, the Nios II processor includes debug request and acknowledge signals. These signals let another
device temporarily suspend the Nios II processor for debug purposes. The signals are exported to the top
level of your Qsys system.
For more information about the debug signals, refer to the Processor Architecture chapter of the Nios II
Processor Reference Handbook.
Related Information
• Processor Architecture on page 2-1
• Processor Architecture
Break Vector
When the Nios II processor contains a JTAG debug module, Qsys determines a break vector (break
address). Break vector memory is always the processor core you are configuring. Break vector offset is
fixed at 0x20. Qsys calculates the physical address of the break vector from the memory module’s base
address and the offset.
When the Nios II processor does not contain a JTAG debug module, you can edit the break vector
parameters in the manner described in General Exception Vector” section.
(39)
Level 4 requires the purchase of a software upgrade from Imagination Technologies or Lauterbach.
(40)
Not including the dedicated JTAG pins on the Altera FPGA.
(41)
An additional license from Imagination Technologies is required to use more than 16 frames.
(42)
Off-chip trace requires the purchase of additional hardware from Imagination Technologies or Lauterbach.
NII51004
2015.04.02
Debug Signals
4-15
Instantiating the Nios II Processor
Altera Corporation
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