Specifications

Related Information
• Programming Model on page 3-1
• Programming Model
Interrupt Controller Interfaces
The Interrupt controller setting determines which of the following configurations is implemented:
• Internal interrupt controller
• External interrupt controller (EIC) interface
The EIC interface is available only on the Nios II/f core.
Note:
When the EIC interface and shadow register sets are implemented on the Nios II core, you must
ensure that your software is built with the Nios II Embedded Design Suite (EDS) version 9.0 or
higher. Earlier versions have an implementation of the eret instruction that is incompatible with
shadow register sets.
For details about the EIC interface, refer to “Exception Processing” in the Programming Model chapter of
the Nios II Processor Reference Handbook.
Related Information
• Programming Model on page 3-1
• Programming Model
Shadow Register Sets
The Number of shadow register sets setting determines whether the Nios II core implements shadow
register sets. The Nios II core can be configured with up to 63 shadow register sets.
Shadow register sets are available only on the Nios II/f core.
Note:
When the EIC interface and shadow register sets are implemented on the Nios II core, you must
ensure that your software is built with the Nios II EDS version 9.0 or higher.
For details about shadow register sets, refer to “Registers” in the Programming Model chapter of the Nios
II Processor Reference Handbook.
Related Information
• Programming Model on page 3-1
• Programming Model
HardCopy Compatible
The HardCopy Compatible parameter determines whether the instantiated Nios II core is compatible
with HardCopy
®
devices without recompilation. This feature allows you to migrate from an FPGA device
to HardCopy device without any RTL changes to the Nios II core. When HardCopy Compatible is on,
any generated Nios II core and JTAG debug module RAM blocks are not pre-initialized.
Note:
When Device family on the Qsys Project Settings tab is a HardCopy device, HardCopy
Compatible is automatically turned on and uneditable.
Altera no longer offers HardCopy structured ASIC products for new design starts. Altera continues to
support HardCopy for existing designs. Customers can find product documentation for the HardCopy
structured ASIC series in the Altera mature devices product listing.
4-10
Interrupt Controller Interfaces
NII51004
2015.04.02
Altera Corporation
Instantiating the Nios II Processor
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