User guide

© 2010 Ingenieurbüro Für Ic-Technologie Page 40
Port description
Portname Direction Usage Description
xreaddata[31..0] input
External
External DPRAM readdata
xreaddatavalid input External
External DPRAM readdatavalid
xwaitrequest input
External External DPRAM waitrequest
xaddress[17..0]
output External External DPRAM address
xbyteenable[3..0]
output
External
External DPRAM byteenable
xchipselect
output External External DPRAM chipselect
xread
output External External DPRAM read
xwrite
output
External
External DPRAM write
xwritedata[31..0]
output External External DPRAM writedata
Tip
 when having no PHY-Board available, you can test the
GMACII transmitter with STP (Signaltap) when
connecting the clk125 also to the RX_CLK port