Specifications

Altera Corporation iii
Preliminary
Contents
About this Tutorial ................................................................................. v
How to Contact Altera ............................................................................................................................ vi
Typographic Conventions ...................................................................................................................... vi
Nios II Hardware Development ................................................................... 1
Introduction ............................................................................................................................................ 1–1
Example Design ................................................................................................................................ 1–1
Software and Hardware Requirements ........................................................................................ 1–2
OpenCore Plus Evaluation .............................................................................................................. 1–4
Nios II System Development Flow ..................................................................................................... 1–5
Analyzing System Requirements ................................................................................................... 1–6
Defining and Generating the System in SOPC Builder .............................................................. 1–7
Quartus II Hardware Development Tasks ................................................................................... 1–7
Nios II IDE Software Development Tasks .................................................................................... 1–8
Running and Debugging Software on the Target Board ............................................................ 1–9
Varying the Development Flow ..................................................................................................... 1–9
Refining the Software and Hardware ...................................................................................... 1–9
Iteratively Creating a Nios II System ..................................................................................... 1–10
Verifying the System with Hardware Simulation Tools ..................................................... 1–10
Creating the Example Design ............................................................................................................ 1–10
Install the Design Files ................................................................................................................... 1–11
Analyze System Requirements .....................................................................................................1–12
Start the Quartus II Software and Open the Tutorial Example Design Project ..................... 1–12
Create a New SOPC Builder System ........................................................................................... 1–14
Define the System in SOPC Builder ............................................................................................. 1–15
Specify Target FPGA and Clock Settings .............................................................................. 1–15
Add the On-Chip Memory ...................................................................................................... 1–16
Add the Nios II Processor Core .............................................................................................. 1–17
Add the JTAG UART ................................................................................................................ 1–20
Add the Interval Timer ............................................................................................................ 1–21
Add the System ID Peripheral ................................................................................................ 1–23
Add the PIO ............................................................................................................................... 1–24
Specify Base Addresses and Interrupt Request Priorities ................................................... 1–25
Generate the SOPC Builder System ....................................................................................... 1–26
Integrate the SOPC Builder System into the Quartus II Project .............................................. 1–28
Instantiate the SOPC Builder System Module in the Quartus II Project ........................... 1–28
Assign FPGA pins ..................................................................................................................... 1–30
Compile the Quartus II Project and Verify Timing .............................................................. 1–32
Download Hardware Design to Target FPGA ........................................................................... 1–33
Develop Software Using the Nios II IDE .................................................................................... 1–34