Specifications

1–8 Altera Corporation
October 2007
Nios II System Development Flow Nios II Hardware Development Tutorial
intellectual property (IP) design modules available from Altera or third
party IP providers. This tutorial does not cover adding other logic outside
the Nios II system.
Using the Quartus II software, you also assign pin locations for I/O
signals, specify timing requirements, and apply other design constraints.
Finally, you compile the Quartus II project to produce an SRAM Object
File to configure the FPGA.
You download the SRAM Object File to the FPGA on the target board
using an Altera download cable, such as the USB-Blaster. After
configuration, the FPGA behaves as specified by the hardware design,
which in this case is a Nios II processor system.
f For further information on using the Quartus II software, see the Quartus
II Tutorial in the Quartus II help system, and both Introduction to the
Quartus II Software and the Quartus II Handbook, available at
www.altera.com/literature/lit-qts.jsp.
Nios II IDE Software Development Tasks
Using the Nios II IDE, you perform all software development tasks for
your Nios II processor system. After you generate the system with SOPC
Builder, you can begin designing your C/C++ application code
immediately with the Nios II IDE. Altera provides component drivers
and a hardware abstraction layer (HAL) which allows you to write
Nios II programs quickly and independently of the low-level hardware
details. In addition to your application code, you can design and reuse
custom libraries in your Nios II IDE projects.
If you do not have a target board for software development, you can run
and debug your code with the Nios II instruction set simulator (ISS). The
ISS simulates the processor, memory, and stdin/stdout/stderr
streams, which allows you to verify program flow and algorithm
correctness. As soon as you have a target board with an Altera FPGA
configured with the Nios II system, you can download your software to
the board using an Altera download cable, such as the USB-Blaster.
To create a new Nios II C/C++ application project, the Nios II IDE
requires the SOPC Builder System File. You also need the SRAM Object
File to configure the FPGA before running and debugging the application
project on target hardware.
The IDE can produce several outputs, listed below. Not all projects
require all of these outputs.