Specifications

Altera Corporation 45
EPXA1 Development Board Hardware Reference Manual
Test Points
Table 35 on page 45 lists the test points on the EPXA1 development board.
Test Pads
Table 36 lists the test pads on the EPXA1 development board.
Table 35. EPXA1 Development Board Test Points
Test Point Connected To Test Point Connected To
TP1 GND TP6 1V8
TP2 GND TP7 GND
TP3 EBI_CLK TP8 GND
TP4 GND TP9 5V
TP5 3V3 TP10 GND
Table 36. EPXA1 Development Board Test Pads
Test Pad Connected To Test Pad Connected To
T1 EBI chip-select 3 T9 EBI byte enable 1
T2 EBI write enable T10 JTAG clock
T3 Ethernet loopback active output T11 JTAG data output
T4 EBI output enable T12 JTAG mode select
T5 EBI chip-select 0 T13 JTAG data input
T6 EBI chip-select 2 T14 Feedback clock to PLL2
T7 EBI byte enable 0 T15 25-MHz clock
T8 EBI chip-select 1