Specifications

Altera Corporation 25
EPXA1 Development Board Hardware Reference Manual
 The only device for which you cannot change the clock input is
the Ethernet. The Ethernet clock input is the 25-MHz oscillator,
X1.
Apart from selecting the clock inputs, you can also select the target
devices for each clock input.
 If you plug in an alternative crystal oscillator, it drives the same
clock line as the SMA connector. To drive a clock through the
SMA connector, you must remove the alternative crystal
oscillator.
Table 16 on page 25 lists all the clock signals on the development board.
Table 16. EPXA1 Development Board Clocks (Part 1 of 2)
Clock Source EPXA1 Pin
(or Board
Connection)
Signal Name Description Target
Device
CLK_REF (1) H7 CLK_REF Main clock used to drive the embedded stripe of
the EPXA1. Dedicated input selected from
either the SMA connector or the 25 MHz crystal
oscillator using jumper CLKA Select (J13)
EPXA1
CLKA_1 U1 CLK1p Dedicated pin that drives PLL1 EPXA1
CLKA_2 R21 CLK2p Dedicated pin that drives PLL2 EPXA1
CLKA_3
(OSC_BUFF1)
(J3.9) H5V_OSC Clock to long expansion header Long
expansion
header
CLKA_4
(OSC_BUFF2)
(J11.9) H5V_OSC Clock to standard expansion header Standard
expansion
header
CLKB_0 V1 CLK3p Dedicated pin that drives PLL3 EPXA1
CLKB_1 P21 CLK4p Dedicated pin that drives PLL4 EPXA1
OSC_25MHZ (U9:1) XTAL1 Clock to Ethernet; optionally used for other
development board modules
Ethernet
CLKLK_ENA R6 CLKLK_ENA Clock-enable for PLL circuitry; permanently on EPXA1
CLKLK_OUT2p U22 CLKLK_OUT2p Dedicated pin allowing PLL2 output to be driven
off-chip, providing the PLL clock to the
expansion headers as H5V_CLK
Standard
expansion
header,
Long
expansion
header