Specifications

24 Altera Corporation
EPXA1 Development Board Hardware Reference Manual
Note:
(1) Determines whether the JTAG chains operate in serial or parallel mode.
Clocks
There are three potential clock sources on the EPXA1 development board,
which can be enabled and disabled according to your design
requirements:
■ Dedicated on-board, 25-MHz crystal oscillator, X1 (default clock for
all devices)
■ Socket for alternative 5-V DIL14 crystal oscillator, XSKT1
■ Generator clock input via SMA connector, SMA1
The location of the clocks on the development board is shown in Figure 9.
Figure 9. Clocks on the EPXA1 Development Board
Table 15. Jumpers on the EPXA1 Development Board
Jumper Function Pins 1-2 Connected Pins 2-3 Connected
JSELECT
(J5) (1)
JTAG connector selection ARM922 TAP available on Multi-
ICE connector
ARM922 TAP available on JTAG
connector
CLKA Select
(J13)
Clock A input selection 25 MHz on-board oscillator
selected
Alternative 5-V DIL14 oscillator or
SMA connector selected
CLKB Select
(J14)
Clock B input selection 25 MHz on-board oscillator
selected
Alternative 5-V DIL14 oscillator or
SMA connector selected