Specifications

Altera Corporation 9
Hardware Reference Manual
Specifications
1
EPXA10 Development Board
Features
Powerful development board for embedded processor PLD designs
Features an EPXA10F1020C2 device
Supports intellectual property-based (IP-based) designs using a
microprocessor
Industry-standard interconnections
10/100 megabits per second (Mbps) Ethernet with full and half
duplexing
Two 3.3-V, 32-bit peripheral component interconnect (PCI)
connectors
These features require additional IP blocks; contact Altera
for further details.
Two RS-232 ports (data terminal equipment (DTE))
Memory subsystem
16-Mbyte flash memory
Up to 512-Mbyte single data rate (SDR) SDRAM in a DIMM
socket
Multiple clocks for communications system design
Multiple ports for configuration and debugging
IEEE Std. 1149.1 Joint Test Action Group (JTAG)
Support for configuring the EPXA10 device using flash memory,
an EPC2, or a MasterBlaster
or ByteBlasterMV
cable
Expansion headers for greater flexibility and capacity
Four expansion headers for daughter-card access
3.3-V/5-V/12-V/12-V expansion/prototype headers to
support up to 502 user I/O pins
Additional user-interface features
One user-definable 9-bit dual in-line package (DIP) switch block
Four user-definable push-button switches
Eight user-definable LEDs
Test points and logic analyzer connectors provided to facilitate
system development
Trace port connections
General
Description
Designers can use the EPXA10 development board as a desktop
development system. It provides a hardware platform to start developing
embedded systems immediately; and delivers clocks, debugging, and
trace facilities to support the system under development in an ARM
®
-
based EPXA10 embedded processor PLD.