Specifications

Guideline: Adhere to the LVDS I/O Restrictions and Differential Pad Placement
Rules...........................................................................................................................................5-19
I/O Banks Locations in Cyclone V Devices............................................................................................5-19
I/O Banks Groups in Cyclone V Devices...............................................................................................5-21
Modular I/O Banks for Cyclone V E Devices............................................................................5-21
Modular I/O Banks for Cyclone V GX Devices.........................................................................5-22
Modular I/O Banks for Cyclone V GT Devices.........................................................................5-23
Modular I/O Banks for Cyclone V SE Devices..........................................................................5-24
Modular I/O Banks for Cyclone V SX Devices..........................................................................5-25
Modular I/O Banks for Cyclone V ST Devices..........................................................................5-26
I/O Element Structure in Cyclone V Devices........................................................................................5-26
I/O Buffer and Registers in Cyclone V Devices.........................................................................5-27
Programmable IOE Features in Cyclone V Devices.............................................................................5-28
Programmable Current Strength.................................................................................................5-29
Programmable Output Slew-Rate Control.................................................................................5-30
Programmable IOE Delay.............................................................................................................5-30
Programmable Output Buffer Delay...........................................................................................5-30
Programmable Pre-Emphasis......................................................................................................5-31
Programmable Differential Output Voltage..............................................................................5-31
I/O Pins Features for Cyclone V Devices...............................................................................................5-32
Open-Drain Output.......................................................................................................................5-32
Bus-Hold Circuitry........................................................................................................................5-33
Pull-up Resistor..............................................................................................................................5-33
On-Chip I/O Termination in Cyclone V Devices.................................................................................5-33
R
S
OCT without Calibration in Cyclone V Devices..................................................................5-34
R
S
OCT with Calibration in Cyclone V Devices........................................................................5-35
R
T
OCT with Calibration in Cyclone V Devices.......................................................................5-37
Dynamic OCT in Cyclone V Devices..........................................................................................5-39
LVDS Input R
D
OCT in Cyclone V Devices..............................................................................5-40
OCT Calibration Block in Cyclone V Devices...........................................................................5-41
External I/O Termination for Cyclone V Devices.................................................................................5-43
Single-ended I/O Termination.....................................................................................................5-44
Differential I/O Termination.......................................................................................................5-46
Dedicated High-Speed Circuitries...........................................................................................................5-51
High-Speed Differential I/O Locations.......................................................................................5-51
LVDS SERDES Circuitry..............................................................................................................5-53
True LVDS Buffers in Cyclone V Devices..................................................................................5-54
Emulated LVDS Buffers in Cyclone V Devices.........................................................................5-62
Differential Transmitter in Cyclone V Devices.....................................................................................5-62
Altera Corporation
TOC-5
Cyclone V Device Handbook Volume 1: Device Interfaces and Integration