Specifications

ChangesVersionDate
• Updated the tables listing the number of LVDS channels for the
Cyclone V devices:
• Removed the F256 package from Cyclone V GX C3 device.
• Removed the F324 package from the Cyclone V GX C4 and C5, and
Cyclone V GT D5 devices.
• Changed the F324 package of the Cyclone V GX C3 device to U324.
• Separated the Cyclone V GX C4 and C5 devices to different rows.
• Removed the F672 package from Cyclone V E A5.
• Added the M301 package to the Cyclone V GX C5 and Cyclone V
GT D5 devices.
• Added the M383 package to the Cyclone V E A2, A4 and A4,
Cyclone V GX C5, and Cyclone V GT D5 devices.
• Added the M484 package to the Cyclone V E A7, Cyclone V GX C7,
and Cyclone V GT D7 devices.
• Added the U484 package to the Cyclone V E A9, Cyclone V GX C9,
and Cyclone V GT D9 devices.
• Added the F484 package to the Cyclone V GX C9 and Cyclone V
GT D9 devices.
• Updated the data realignment timing figure to improve clarity.
• Updated the receiver data realignment rollover figure to improve clarity.
• Reorganized content and updated template.
• Added the I/O resources per package and I/O vertical migration sections
for easy reference.
• Added the steps to verify pin migration compatibility using the
Quartus II software.
• Updated the I/O standards support table with HPS I/O information.
2012.12.28December 2012
• Added topic about the reference clock pin restriction for LVDS
application.
• Updated the pin placement guideline for using LVDS differential
channels.
• Added guideline about using the external PLL mode.
• Rearranged the I/O banks groups tables for easier reference.
• Removed statements that imply that V
REF
pins can be used as normal
I/Os.
• Updated the 3.3 V LVTTL programmable current strength values.
• Restructured the information in the topic about I/O buffers and registers
to improve clarity and for faster reference.
• Added HPS information to the topic on programmable IOE features.
• Rearranged the tables about on-chip I/O termination for clarity and
topic-based reference.
• Updated the high-speed differential I/O locations diagram for
Cyclone V GX, SX, and ST devices.
I/O Features in Cyclone V Devices
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Document Revision History
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2013.06.21