Specifications

Figure 5-43: Bit Orientation in the Quartus II Software
This figure shows the data bit orientation of the x10 mode.
9 8 7 6 5 4 3 2 1 0
10 LVDS Bits
MSB LSB
incloc k/outcloc k
data in
Differential I/O Bit Position
Data synchronization is necessary for successful data transmission at high frequencies.
The following figure shows the data bit orientation for a channel operation and is based on the following
conditions:
• The serialization factor is equal to the clock multiplication factor.
• The phase alignment uses edge alignment.
• The operation is implemented in hard SERDES.
Figure 5-44: Bit-Order and Word Boundary for One Differential Channel
7 6 5 4 3 2 1 0
MSB LSB
X X X X X X X X
X X X X X X X X
Current Cycle
X
X X X X X X X X
rx_in
7 6 5 4 3 2 1 0
X X X X X X X X X X X X X X X
rx_out [7..0]
X X X X X X X X X X X X X X X X X X X X 7 6 5 4 3 2 1 0 X X X X
Previous Cycle Next Cycle
tx_out
tx_outclock
rx_inclock
rx_outclock
Transmitter Channel Operation (x8 Mode)
Receiver Channel Operation (x8 Mode)
Note: These waveforms are only functional waveforms and do not convey timing information
For other serialization factors, use the Quartus II software tools to find the bit position within the word.
Differential Bit Naming Conventions
The following table lists the conventions for differential bit naming for 18 differential channels. The MSB
and LSB positions increase with the number of channels used in a system.
Table 5-42: Differential Bit Naming
This table lists the conventions for differential bit naming for 18 differential channels, and the bit positions after
deserialization.
Internal 8-Bit Parallel Data
Receiver Channel Data Number
LSB PositionMSB Position
071
8152
16233
24314
Altera Corporation
I/O Features in Cyclone V Devices
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Differential I/O Bit Position
CV-52005
2013.06.21