Specifications
Table 5-38: LVDS Channels Supported in Cyclone V SE Devices—Preliminary
RXTXSidePackageMember Code
21Top
484-pin Ultra FineLine BGA
A2 and A4
44Right
1210Bottom
21Top
672-pin Ultra FineLine BGA 65Right
2926Bottom
21Top
484-pin Ultra FineLine BGA
A5 and A6
44Right
1210Bottom
21Top
672-pin Ultra FineLine BGA 65Right
2926Bottom
2020Top
896-pin FineLine BGA 1212Right
4040Bottom
Table 5-39: LVDS Channels Supported in Cyclone V SX Devices—Preliminary
RXTXSidePackageMember Code
21Top
672-pin Ultra FineLine BGAC2 and C4 65Right
2926Bottom
21Top
672-pin Ultra FineLine BGA
C5 and C6
65Right
2926Bottom
2020Top
896-pin FineLine BGA 1212Right
4040Bottom
Table 5-40: LVDS Channels Supported in Cyclone V ST Devices—Preliminary
RXTXSidePackageMember Code
2020Top
896-pin FineLine BGAD5 and D6 1212Right
4040Bottom
Altera Corporation
I/O Features in Cyclone V Devices
Send Feedback
5-61
True LVDS Buffers in Cyclone V Devices
CV-52005
2013.06.21