Specifications

Calibrated OCT (Output)
I/O Standard
RZQ (Ω)
R
S
(Ω)
(11)
24034, 40SSTL-125
24034, 40, 48, 60, 80HSUL-12
10025, 50
Differential SSTL-15
24034, 40
24034, 40Differential SSTL-135
24034, 40Differential SSTL-125
24034, 40, 48, 60, 80Differential HSUL-12
The R
S
OCT calibration circuit compares the total impedance of the I/O buffer to the external reference
resistor connected to the RZQ pin and dynamically enables or disables the transistors until they match.
Calibration occurs at the end of device configuration. When the calibration circuit finds the correct impedance,
the circuit powers down and stops changing the characteristics of the drivers.
Figure 5-13: R
S
OCT with Calibration
This figure shows the R
S
as the intrinsic impedance of the output transistors.
V
CCIO
R
S
R
S
GND
Z
0
= 50 Ω
Driver
Series Termination
Receiving
Device
Related Information
On-Chip I/O Termination in Cyclone V Devices on page 5-33
R
T
OCT with Calibration in Cyclone V Devices
The Cyclone V devices support R
T
OCT with calibration in all banks. R
T
OCT with calibration is available
only for configuration of input and bidirectional pins. Output pin configurations do not support R
T
OCT
with calibration. If you use R
T
OCT, the V
CCIO
of the bank must match the I/O standard of the pin where
you enable the R
T
OCT.
(11)
Final values are pending silicon characterization.
Altera Corporation
I/O Features in Cyclone V Devices
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5-37
R
T
OCT with Calibration in Cyclone V Devices
CV-52005
2013.06.21