Specifications

Bus-Hold Circuitry
Each I/O pin provides an optional bus-hold feature that is active only after configuration. When the device
enters user mode, the bus-hold circuit captures the value that is present on the pin by the end of the
configuration.
The bus-hold circuitry uses a resistor with a nominal resistance (R
BH
), approximately 7 kΩ, to weakly pull
the signal level to the last-driven state of the pin. The bus-hold circuitry holds this pin state until the next
input signal is present. Because of this, you do not require an external pull-up or pull-down resistor to hold
a signal level when the bus is tri-stated.
For each I/O pin, you can individually specify that the bus-hold circuitry pulls non-driven pins away from
the input threshold voltage—where noise can cause unintended high-frequency switching. To prevent over-
driving signals, the bus-hold circuitry drives the voltage level of the I/O pin lower than the V
CCIO
level.
If you enable the bus-hold feature, you cannot use the programmable pull-up option. To configure the I/O
pin for differential signals, disable the bus-hold feature.
Pull-up Resistor
Each I/O pin provides an optional programmable pull-up resistor during user mode. The pull-up resistor
weakly holds the I/O to the V
CCIO
level.
The Cyclone V device supports programmable weak pull-up resistors only on user I/O pins but not on
dedicated configuration pins, dedicated clock pins, or JTAG pins .
If you enable this option, you cannot use the bus-hold feature.
On-Chip I/O Termination in Cyclone V Devices
Dynamic R
S
and R
T
OCT provides I/O impedance matching and termination capabilities. OCT maintains
signal quality, saves board space, and reduces external component costs.
The Cyclone V devices support OCT in all FPGA I/O banks. For the HPS I/Os, the column I/Os do not
support OCT.
Table 5-28: OCT Schemes Supported in Cyclone V Devices
Supported in HPS Row I/OsOCT SchemesDirection
YesR
S
OCT with calibration
Output
YesR
S
OCT without calibration
YesR
T
OCT with calibration
Input
—R
D
OCT (LVDS and SLVS
I/O standards only)
YesDynamic R
S
OCT and R
T
OCT
Bidirectional
Related Information
• R
S
OCT without Calibration in Cyclone V Devices on page 5-34
Altera Corporation
I/O Features in Cyclone V Devices
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5-33
Bus-Hold Circuitry
CV-52005
2013.06.21