Specifications

Related Information
• I/O Banks Locations in Cyclone V Devices on page 5-19
• Guideline: Use the Same V
CCPD
for All I/O Banks in a Group on page 5-17
Provides guidelines about V
CCPD
and I/O banks groups.
Modular I/O Banks for Cyclone V ST Devices
Table 5-22: Modular I/O Banks for Cyclone V ST Devices—Preliminary
The HPS row and column I/O counts are the number of HPS-specific I/O pins on the device. Each HPS-
specific pin may be mapped to several HPS I/Os.
Note:
D6D5Member Code
F896F896Package
32323A
FPGA I/O Bank
48483B
80804A
32325A
16165B
56566A
HPS Row I/O Bank
44446B
19197A
HPS Column I/O Bank
22227B
12127C
14147D
80808AFPGA I/O Bank
455455Total
Related Information
• I/O Banks Locations in Cyclone V Devices on page 5-19
• Guideline: Use the Same V
CCPD
for All I/O Banks in a Group on page 5-17
Provides guidelines about V
CCPD
and I/O banks groups.
I/O Element Structure in Cyclone V Devices
The I/O elements (IOEs) in Cyclone V devices contain a bidirectional I/O buffer and I/O registers to support
a complete embedded bidirectional single data rate (SDR) or double data rate (DDR) transfer.
The IOEs are located in I/O blocks around the periphery of the Cyclone V device.
The Cyclone V SE, SX, and ST devices also have I/O elements for the HPS.
I/O Features in Cyclone V Devices
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Modular I/O Banks for Cyclone V ST Devices
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2013.06.21