User guide

SFSU - Embedded Systems Tutorial Nano- Electronics & Computing Research Lab
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.VGA_SYNC_from_the_video_vga_controller(),
.VGA_VS_from_the_video_vga_controller()
)
Step 12: Compile and run the system.
With this step, the hardware simulation is complete.
Software Setup
This step relies on the .sopcinfo file created when generating the SOPC System Buider
system.
Open Nios II SBT for Eclipse
Indicate workspace as your project directory, and create a new file called
“Software” and click “Okay”
Set perspective to Nios II:
Menu -> Window -> Open Perspective -> Other -> Nios II
Menu -> File -> New -> Nios II Application and BSP from Template
Under “Target Hardware Information” select file <directory>\nios.sopcinfo
Under “Application Project” type “Binary Adder” as “Project Name”
Under “Project Template” select “helloWorld”
Click “Finish”