User guide

SFSU - Embedded Systems Tutorial Nano- Electronics & Computing Research Lab

Step 4 : Open the folder where the project files are saved and open “tpad_alu_display.qpf” file. This file

will be opened in quartus II.

Step 5: In Quartus II, the Verilog code will look like this (in blue):

//=======================================================

// This code is generated by Terasic System Builder

//=======================================================

module tpad_alu_display(

//////////// CLOCK //////////

CLOCK_50,

CLOCK2_50,

CLOCK3_50,

//////////// LED //////////

LEDG,

LEDR,

//////////// SW //////////

SW,

//////////// VGA //////////

VGA_B,

VGA_BLANK_N,

VGA_CLK,

VGA_G,

VGA_HS,

VGA_R,

VGA_SYNC_N,

VGA_VS,