Specifications

1–2 Chapter 1: Overview
General Description
Cyclone III 3C120 Development Board Reference Manual © March 2009 Altera Corporation
The Cyclone III development board has the following main features:
High logic density to implement more functions and features
Embedded memory for high-bandwidth applications
Expandable through two Altera High-Speed Mezzanine Connectors (HSMCs)
256-MB of dual channel DDR2 SDRAM with a 72-bit data width
Supports high-speed external memory interfaces including dual-channel DDR
SDRAM and low-power SRAM
Four user push-button switches
Eight user LEDs
Power consumption display
The Cyclone III development board provides the following advantages:
Unique combination of low-cost, low-power Cyclone III FPGA that supports
high-volume, memory-intensive designs
Highest multiplier-to-logic ratio FPGA in the industry
Lowest cost, density- and power-optimized FPGA
Quartus II development software’s power optimization tools
Board Component Blocks
The board features the following major component blocks:
780-pin Altera Cyclone III EP3C120 FPGA in a BGA package
119K logic elements (LEs)
3,888 Kbits of memory
288 18 × 18 multiplier blocks
Four phase locked loops (PLLs)
20 global clock networks
531 user I/Os
1.2-V core power
256-pin Altera MAX
®
II EPM2210G CPLD in a FineLine Ball Grid Array (FBGA)
package
1.8-V core power
On-board memory
256-MB dual-channel DDR2 SDRAM
8-MB SRAM
64-MB flash memory