Datasheet

®
AS7C34098A
Read waveform 2 (CE, OE, UB, LB controlled)
6,8,9
t
RC
Address
OE
t
AA
t
OE
t
OHZ
t
OLZ
t
OH
CE
LB, UB
t
ACE
t
CLZ
t
CHZ
Data
OUT
t
BLZ
t
BA
Da t a valid
t
BHZ
Write cycle (over the operating range)
10
Parameter
Symbol
–10
–12
–15
–20
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Write cycle time
t
WC
10
–
12
–
15
–
20
–
ns
Chip enable (CE) to write end
t
CW
7
–
8
–
10
–
12
–
ns
Address setup to write end
t
AW
7
–
8
–
10
–
12
–
ns
Address setup time
t
AS
0
–
0
–
0
–
0
–
ns
Write pulse width (OE = High)
t
WP1
7
–
8
–
10
–
12
–
ns
Write pulse width (OE = Low)
t
WP2
10
–
12
–
15
–
20
–
ns
Write recovery time
t
WR
0
–
0
–
0
–
0
–
ns
Address hold from end of write
t
AH
0
–
0
–
0
–
0
–
ns
Data valid to write end
t
DW
5
–
6
7
–
9
–
ns
Data hold time
t
DH
0
–
0
–
0
–
0
–
ns
4, 5
Write enable to output in High-Z
t
WZ
0
5
0
6
0
7
0
9
ns
4, 5
Output active from write end
t
OW
3
–
3
–
3
–
3
–
ns
4, 5
Byte enable Low to write end
t
BW
7
–
8
–
10
–
12
–
ns
4, 5
11/14/11,v. 2.2 Alliance Memory Inc P. 5 of 11