Datasheet

ManualsBrandsAlliance Memory ManualsMemory ICsSRAM 4MB 10ns TSOP-II

August

2004

AS7C34098A

3.3 V 256 K × 16 CMOS SRAM

Features

• Pin compatible with AS7C34098

• Industrial and commercial temperature

• Organization: 262,144 words × 16 bits

• Center power and ground pins

• High speed

- 10/12/15/20 ns address access

time

- 4/5/6/7 ns output enable access

time

• Low power consumption: ACTIVE

- 650 mW /max @ 10 ns

• Low power consumption: STANDBY

- 28.8 mW /max CMOS

• Individual byte read/write controls

• Easy memory expansion with CE, OE inputs

• TTL- and CMOS-compatible, three-state I/O

• JEDEC standard packages

- 44-pin SOJ -400-mil

- 44-pin TSOP 2

- 48-pin Mini BGA

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA

Logic block diagram Pin arrangement for SOJ Bottom View 48BGA

and TSOP 2

Selection guide

–10

–12

–15

–20

Unit

Maximum address access time

Maximum output enable access time

Maximum operating current

Industrial

180

160

140

110

Commercial

170

150

130

100

Maximum CMOS standby current

11/14/11, v. 2.2 Alliance Memory Inc. P. 1 of 11

Summary of content (11 pages)

PAGE 1
AS7C34098A August 2004 ® 3.
PAGE 2
AS7C34098A ® Functional description The AS7C34098A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications.
PAGE 3
AS7C34098A ® Recommended operating conditions Parameter Symbol Supply voltage VIH Unit 3.0 3.3 3.6 V 2.0 – VCC + 0.5 V * –0.5 – 0.8 V VIL Ambient operating temperature Max ** VCC (10/12/15/20) Input voltage Min Typical commercial TA 0 – 70 °C industrial TA –40 – 85 °C * V min = –1.0V for pulse width less than 5ns. IL * VIH max = VCC + 2.0V for pulse width less than 5ns.
PAGE 4
AS7C34098A ® Read cycle (over the operating range)3,9 –10 Parameter –12 –15 –20 Symbol Min Max Min Max Min Max Min Max Unit Notes Read cycle time tRC 10 – 12 – 15 – 20 – ns Address access time tAA – 10 – 12 – 15 – 20 ns Chip enable (CE) access time tACE – 10 – 12 – 15 – 20 ns Output enable (OE) access time tOE – 4 – 5 – 6 – 7 ns Output hold from address change tOH 3 – 3 – 3 – 3 – ns 5 CE Low to output in low Z tCLZ 3 – 3 – 3 – 3
PAGE 5
AS7C34098A ® Read waveform 2 (CE, OE, UB, LB controlled)6,8,9 tRC Address tAA OE tOHZ tOE tOH tOLZ CE tACE tCHZ tCLZ LB, UB tBA tBHZ tBLZ DataOUT Data valid Write cycle (over the operating range)10 –10 Parameter Symbol Min –12 –15 –20 Max Min Max Min Max Min Max Unit Note Write cycle time tWC 10 – 12 – 15 – 20 – ns Chip enable (CE) to write end tCW 7 – 8 – 10 – 12 – ns Address setup to write end tAW 7 – 8 – 10 – 12 – ns Address setup time tAS 0 –
PAGE 6
AS7C34098A ® Write waveform 1(WE controlled)10 tWC tAH tWR Address tCW CE tBW LB, UB tAW tAS tWP WE tDW DataIN Data valid tWZ DataOUT tDH tOW Data undefined High Z Write waveform 2 (CE controlled)10 tWC tAH tWR Address tAS CE tCW tAW tBW LB, UB tWP WE tDW DataIN DataOUT 11/14/11,v. 2.2 tCLZ High Z tWZ Data undefined Alliance Memory Inc tDH Data valid tOW High Z P.
PAGE 7
AS7C34098A ® Write waveform 3 10 tWC tAH tWR Address tAS tCW CE tAW tBW LB, UB tWP WE tDW DataIN Data valid tDH tWZ DataOUT Data undefined High Z High Z AC test conditions - Output load: see Figure B. Input pulse level: GND to 3.0V. See Figure A. Input rise and fall times: 2 ns. See Figure A. Input and output timing reference levels: 1.5V. +3.0V GND +3.3V DOUT 10% 10% 2 ns Figure A: Input pulse 350Ω 168Ω C DOUT GND Figure B: 3.
PAGE 8
AS7C34098A ® Package dimensions c e He 44-pin TSOP 2 d l A2 A 0–5° A1 b E e E1E2 Pin 1 c B A A1 11/14/11,v. 2.2 A A1 A2 B b c D E E1 E2 e 44-pin SOJ 400 mils Min(mils) Max(mils) 0.128 0.148 0.025 0.105 0.115 0.026 0.032 0.015 0.020 0.007 0.013 1.120 1.130 0.370 NOM 0.395 0.405 0.435 0.445 0.050 NOM D 44-pin SOJ b A A1 A2 b c d e He E l 44-pin TSOP 2 Min (mm) Max (mm) 1.2 0.05 0.15 0.95 1.05 0.3 0.45 0.21 0.12 18.31 18.52 10.06 10.26 11.68 11.94 0.80 (typical) 0.40 0.
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AS7C34098A ® Outline of 48BGA 11/14/11,v. 2.2 Alliance Memory Inc P.
PAGE 10
AS7C34098A ® Ordering Codes Package SOJ BGA TSOP 2 Temperature 10 ns Commercial AS7C34098A-10JC 12 ns AS7C34098A-12JC 15 ns 20 ns AS7C34098A-15JC AS7C34098A-20JC Industrial AS7C34098A-10JI AS7C34098A-12JI AS7C34098A-15JI AS7C34098A-20JI Industrial AS7C34098A-10BIN Commercial AS7C34098A-10TC AS7C34098A-12TC AS7C34098A-15TC AS7C34098A-20TC Industrial AS7C34098A-10TI AS7C34098A-12TI AS7C34098A-15TI AS7C34098A-20TI Note: Add suffix ‘N’ to the above part numbers for Lead Free Parts.
PAGE 11
AS7C34098A ® ® Alliance Memory, Inc. 511 Taylor Way, San Carlos, CA 94070 Tel: 650-610-6800 Fax: 650-620-9211 www.alliancememory.com Copyright © Alliance Memory All Rights Reserved Part Number: AS7C34098A Document Version: v. 2.2 © Copyright 2003 Alliance Memory, Inc. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies.