Datasheet

®
32K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
A14
Vcc
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
AS6C62256
PDIP/SOP
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
A13
CE#
OE#
WE#
sTSOP
DQ3
A11
A9
A8
A13
DQ2
A10
A14
A12
A7
A6
A5
Vcc
DQ7
DQ6
DQ5
DQ4
Vss
DQ1
DQ0
A0
A1
A2
A4
A3
AS6C62256
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
OE#
WE#
CE#
ABSOLUTE MAXIMUM RATINGS*
PARAMETER SYMBOL RATING UNIT
Terminal Voltage with Respect to VSS VTERM -0.5 to 7.0 V
0 to 70(C grade)
TerutarepmeTgnitarepO A
-40 to 85(I grade)
TerutarepmeTegarotS STG -65 to 150
PnoitapissiDrewoP D 1 W
ItnerruCtuptuOCD OUT 50 mA
Soldering Temperature (under 10 sec) TSOLDER 260
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
CE# OE# WE#
I/O OPERATION
SUPPLY CURRENT
Standby
H X X
High-Z I
SB
,I
SB1
Output Disable
L H H
High-Z I
CC
,I
CC1
Read
L L H
D
OUT
I
CC
,I
CC1
Write
L X L
D
IN
I
CC
,I
CC1
Note: H = V
IH
, L = V
IL
, X = Don't care.
ºC
ºC
ºC
February 2007
AS6C62256
Alliance Memory Inc.
Page 2 of 12
March 23,2016 v1.2